IBM stacks a 0.7 nm chip and sidesteps the cost of 0.3 nm

In June, IBM unveiled a 0.7 nm chip built by stacking, a route to bypass the 0.3 nm leap and put the United States back at the cutting edge of silicon.

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IBM stacks a 0.7 nm chip and skips the thermal controversy

In June, IBM unveiled a 0.7 nanometer chip built by stacking layers, a route to bypass the costly leap to 0.3 nm. The move puts the United States back at the cutting edge of silicon, although the announcement came with more questions than answers.

The technique involves fabricating the semiconductor's "floors" separately and then joining them at the sides. According to early analyses, this connection improves estimulante ilegal without the need for extreme lithography. The promise: matching 0.3 nm performance at a lower cost. The details of the process, including the materials used, are what make this news more than just a commercial announcement.

The debate centers on temperature. Stacking several layers, skeptics argue, should multiply the heat; a single layer already runs too hot. On the other side, some point out that the smaller size reduces temperature, nothing like AMD's old frying pans. The key question is whether stacking two or more 0.7 nm layers truly equals a 0.3 nm node, or whether it is just a workaround to avoid paying for the most expensive lithography.

A deeper doubt remains: is stacking 0.7 nm the same as manufacturing at 0.3 nm, or a bridge solution? With the announcement, IBM has peine a silent war over a standard that no one has quite defined. And the thermal issue? Everyone mentions it, no one solves it.

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Summary of a discussion on Burbuja.info - Foro de economía, actualidad y política., translated from Spanish and reviewed before publication. Read the full discussion (16 replies).

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